With reference to FIG. 1, there are illustrated the main components of an infrared sensor chip assembly 10 (SCA) as follows. A detector 11 (such as a CdZnTe detector 11) is coupled to a readout IC (ROIC) 13 via one or more indium interconnects (bumps) 15. The ROIC 13 is coupled to a platform 21 which is coupled to a coldfinger 25 via an endcap 23. The indium interconnects 15 are used to join the detector 11 to the ROIC 13. These indium interconnects 15 take the signals generated by the detector 11 pixels (not shown) and transfer them to the signal processing circuits contained in the ROIC 13. The hybridized detector 11/ROIC 13 may then be attached directly to the platform 21, such as by being adhesively attached.
During operation, SCA 10 is typically cooled to cryogenic temperatures (e.g., 70 K). As the SCA 10 is cooled to such temperatures, problems can arise when different components of the SCA 10 contract at different rates. For example, if the detector 11 is formed of CdZnTe, it will likely contract approximately four times faster than the silicon ROIC 13 to which it is coupled. This differential in contraction strains the indium interconnects 15, particularly at the corners of the detector 11. As the SCA 10 is cycled from ambient to operating temperatures, the indium interconnects 15 can experience substantial fatigue. If the strains experienced by the indium interconnects 15 are excessive, they may fail due to fatigue, usually starting at the corners of the detector 11 where the displacement differential is typically most severe.
One attempt to address this problem is the production of Glued REAdout to Platform (GREATOP) SCAs 10. As used herein “GREATOP” refers to the configuration of SCAs formed, generally, in accordance with the disclosures of U.S. Pat. Nos. 5,672,545 and 5,308,980. GREATOP SCAs 10 utilize a balanced silicon readout/titanium shim/silicon shim wafer assembly 27 to force the contraction of the ROIC 13, formed of silicon, to match that of the detector 11, which may be formed of CdZnTe.
With reference to FIG. 2, there is illustrated a cross section of a GREATOP SCA 10 showing the material expansion mismatches. The titanium shim 17 of the wafer assembly 27 has a thermal contraction rate that is approximately seven times greater than that of silicon. There is illustrated a vertical baseline indicating the alignment of components prior to contraction. As is evident from the horizontal, left pointing arrows, the displacements of the components experienced by unconstrained contraction vary considerably. The relatively high titanium contraction rate forces the silicon ROIC 13 to contract faster than it would by itself.
With reference to FIG. 3, there is illustrated a cross section of a GREATOP SCA 10 wherein the thickness of the titanium shim 17 is chosen so that the contraction of the silicon ROIC 13 approximately matches that of the CdZnTe detector 11. As noted above, this arrangement can greatly reduce, or theoretically eliminate, indium interconnect fatigue failure. The wafer assembly 27 may be further balanced by incorporating a silicon shim 19 below the titanium shim 17 to create an axial symmetry which prevents the GREATOP SCA 10 structure from bowing or warping.
The thermal mismatch between a detector 11 formed of InSb and an ROIC 13 is comparable to that of a detector 11 formed of CdZnTe. Historically, RVS InSb detectors 11 have not utilized a thermal shim concept because the indium interconnects 15 are wicked with adhesive 16 during production. The adhesive 16 wicked in between the detector 11 and ROIC 13 prevents de-hybridization at cooldown. While de-hybridization is not a problem for SDA, the thermal mismatch between the InSb detector 11 and Silicon ROIC 13 causes a substantial amount of detector cracking (up to a 15% yield loss) at initial cooldown.
In order to implement the GREATOP concept on existing products utilizing InSb detectors 11, the entire height of the wafer assembly 27 is designed to be approximately 0.0185 inches, that is, the height of current SDA silicon ROICs 13. In response to this constraint, a wafer assembly 27 structure has been devised of the materials illustrated in FIG. 4. With reference to FIG. 5, there is illustrated an InSb detector 11 showing the maximum principal stress in the InSb detector 11 when it is cooled from 300K to 77K on a leadless chip carrier (LCC). As shown, the maximum principal stress ranges to a high of ˜5,300 psi.
With respect to FIG. 6, there is illustrated the field stress in an InSb detector 11 formed according to the structure illustrated in FIG. 4 and incorporating a reduced thickness titanium shim 17 when it is cooled from 300K to 77K on a leadless chip carrier (LCC). As shown, reducing the thickness of the titanium shim 17 reduces the maximal principal stress to approximately 0 psi. Unfortunately, constructing a sandwich 27 with a reduced titanium shim 17 thickness yields various manufacturing challenges. One significant challenge is maintaining detector flatness while bonding and curing the very thin wafer assembly 27.